CME (Session1) – Components and Circuits for B5G-6G connectivity
Wednesday, 8 June 2022, 10:30-12:00, Room C240
Session Chair: Alice Bossuet (CEA 17 Av. des Martyrs FRANCE, FR)
The Hardware Foundation of 6G: The NEW-6G Approach
Emilio Calvanese Strinati (CEA-LETI, France); Michael Peeters (IMEC & UA, Belgium); Manil Dev Gomony (Nokia Bell Labs, Belgium); Cesar Roda Neve (SOITEC, Belgium); Andreia Cathelin (ST Microelectronics, France); Mauro Boldi (Telecom Italia, Italy); Mark Ingels (Imec, Belgium); Aritra Banerjee (IMEC, USA); Pascal Chevalier (STMicroelectronics, France); Bartłomiej Kozicki (Nokia Bell Labs, Belgium); Didier Belot (CEA-LETI, France)
The design of future 6th Generation (6G) wireless connect-compute-control networks requires new approaches for the design of hardware, new materials and hybridization processes new technological solutions, to create a sustainable foundation for the effective operation of innovative services and use cases. In this context, the New-6G initiative focuses on solutions that capitalize on the latest advances in high-performance semiconductor technologies, integrated circuits, digital components, and wide bandwidth radio frequencies. Based on the applications and use cases, we propose two main loci that will have the largest impact: the challenges and opportunities of baseband processing on the one hand and material enablers and related device and circuit challenges on the other hand. For this second part, BiCMOS, FD-SOI, GaN and InP are highlighted as especially of interest. BiCMOS and FD-SOI have already demonstrated their possible application up to 200GHz. While BiCMOS could be potentially used at higher frequencies, III-V (GaN, InP) alternatives when integrated with CMOS could propose cost-effective solution to address higher-power and higher-efficiency sub-THz 6G applications.
550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology
Alireza Hasani (IHP GmbH, Germany); Lukasz Lopacinski (IHP, Germany); Goran Panic (IHP GmbH, Germany); Eckhard Grass (IHP & Humboldt-University Berlin, Germany)
A fully unrolled fully parallel decoding architecture for LDPC codes is proposed in this paper. Specifically, the iterations of a min-sum decoding scheme are also unrolled and each is implemented with a separate dedicated hardware. The proposed architecture implemented in a 28 nm CMOS technology is able to achieve the throughput of 550 Gbps, occupying an area of 4.98 mm^2. These results are accomplished with 4-bit quantization of the min-sum decoding messages and six iterations in the case of a (648,540)-LDPC code from IEEE 802.11n. The results show improvements compared with the adaptive degeneration  and finite-alphabet  decoding algorithms, in terms of both throughput and chip area.
Ultra High-Speed BP Decoder for Polar Codes Achieving 1.4 Tbps in 28 nm CMOS
Lukasz Lopacinski (IHP, Germany); Alireza Hasani and Goran Panic (IHP GmbH, Germany); Nebojsa Maletic (IHP – Leibniz-Institut für Innovative Mikroelektronik, Germany); Oliver Schrape (IHP, Germany); Jesús Gutiérrez (IHP – Leibniz-Institut für Innovative Mikroelektronik, Germany); Milos Krstic (IHP, Germany); Eckhard Grass (IHP & Humboldt-University Berlin, Germany)
In this paper, we propose pipelining and unrolling schemes for ultra-high speed belief propagation polar decoders. The proof of concept implementation in 28 nm CMOS technology achieves 1380 Gbps of coded throughput with a short polar codeword length of 512 bits, placing it as one of the fastest soft-decision FEC implementations published so far. With a codeword of length 1024 bits, the decoding throughput can be even higher. Moreover, the decoder shows better error correction performance than other ultra-high speed polar decoders published recently. The consumed chip area is 5.98 mm2, and the chip uses five unrolled iterations with constant quantization of four bits at every processing stage.
Toward Eco-Design of a 5G mmWave Transmitarray Antenna Based on Life Cycle Assessment
Josua Guerid (CEA-Leti, France); Jean-Baptiste Doré (CEA-LETI, France); Jacques Reverdy (CEA, France); Bruno Reig (CEA-LETI, France); Antonio Clemente (CEA-LETI Minatec, France); Lea Di Cioccio (CEA-DRT/Leti, France)
5G is seen as one technology enabler to support the expected exponential internet data-traffic growth while digitization environmental impacts are growing. Base stations are estimated to represent the main contributor to mobile internet access network carbon footprint. In this work, life cycle assessment (LCA) of a 26 GHz transmitarray antenna is described taking into consideration the geographical location of the antenna use and providing eco-design leads to researchers, designers, LCA practitioners and industrials. Results show that energy consumption during operation is the main source of impact (between 72% and 94% for most impacts), while the material depletion is largely generated by the manufacturing process (99.3%). As a result, the eco-design must focus on product energy efficiency as well as material depletion during manufacturing. The impact of usage is highly dependent on the location due to the diverse electricity mix of countries. An eco-design solution using phase-change material (PCM) technology switches is compared to a conventional approach using GaAs p-i-n diodes. These results pave the way for reducing the impacts of transmitarray antennas and are a first step towards more sustainable solutions for millimeter wave (mmWave) networks.
Dual-Band Gain-Boosted Planar Lens Antenna Using a Single Layer Metasurface for 6G Applications
Mehrab Ramzan (Barkhausen Institut, Germany); Padmanava Sen (Research Group Leader, Barkhausen Institut gGmbH, Germany)
In this paper, a novel dual-band planar lens antenna using single layer metasurface is proposed. The significance and fabrication feasibility of a planar lens, based on resonant structures over non-resonant structures are highlighted. The single-layer metasurface consists of multiple circular metal patches integrated with rectangular slots, aligned perpendicularly to the polarization of the antenna. The planar lens can experimentally shape and increase the gain of a single patch antenna from 7.2 dBi to 16 dBi at 10 GHz and 12.8 dBi at 10.4 GHz in the regime of X-band, eliminating the need of an array feeding network and corresponding feed losses to achieve such high antenna gains. The measurement results are in good agreement with the EM simulation results.